Configure your Host's 10 Gb Ethernet interface as shown below. The FPGA image should match the version of UHD installed on the host computer when operated in Network mode. NOTE: The 1G FPGA image must be loaded for the SFP+ Port to operate at 1 Gb speeds. Next, you will need to copy this Mender file system image to the USRP E320. Every N3XX series device connected to USB will by default show up as four different devices. The USRP N320 contains 2 channels, each represented on the front panel as RF0-1. 2. Support for 1 GbE, 10 GbE, and Aurora interfaces over two SFP+ ports and 1 QSFP+ port enables high throughput IQ streaming to a host PC or FPGA coprocessor. The USRP E320 systemd network configuration files are located either at: /etc/systemd/network/, or for newer versions of the file system: /data/network/. The Dual SFP+ Connections support multiple configurations for streaming high-speed, low-latency data, depending upon the FPGA image which is loaded. Note: The path and IP may different for your configuration, the command above assumes you're using the default installation path of /usr/local and that the E320's IP is 192.168.1.51. This SDR. 1. It is possible to log into the STM32 using the serial interface (see Connecting to the microcontroller). It has two daughterboards, each has one ADC/DAC and provides one RF channel. Due to product compliance restrictions on products with TPM (Trusted Platform Module) components to a few countries, the USRP N320/N321 is available in two variants: Additional details on the N321 Distribution Board can be found here: This page was last modified on 19 July 2022, at 11:07. The host computer can connect to the RJ45 1 Gb port or Serial Console port to remotely access the Open Embedded Linux operating system running on the ARM CPU. However, certain modifications may result in either bricking the device, or even in physical damage to the unit. The protocols supported on the SFP+ and QSFP+ ports depend on the FPGA image currently loaded. Connect the adapter to a host computer using the Ethernet cable to SFP0. 5. After logging in, you should be presented with a shell like the following: Before operating the device, it is strongly recommended to update to the latest version of the Embedded Linux file system. Every N3XX series device connected to USB will by default show up as four different devices. Ettus Research currently offers direct-connect, copper cabling accessories for the USRP N320/N321. The USRP E320 brings performance to embedded software defined radios by offering four times more FPGA resources compared to the USRP E31x devices. For every daughterboard, there is one input for TX and RX, respectively, resulting in 4 LO inputs total per N310. To load a different FPGA image (i.e. In this section, we will provide general guidance on the types of fiber adapters and cables that can be used with these products. If the 1G image is loaded, the port will be unresponsive at 10 Gb speeds. The following example will map RF0 onto channel 0 of a uhd::usrp::multi_usrp object, and RF3 onto channel 1: Like other USRPs, the N3x0 series have daughterboard and motherboard sensors. Attach an antenna to the Ch0/RX2 antenna port of the N3xx. The GPIOs are not designed to drive high loads! A direct connection to the microcontroller can be used to hard-reset the device without physically accessing it (i.e., emulating a power button press) and other low-level diagnostics. The N321 has an additional board to perform LO signal splitting and distribution. Set bit to 0 for Radio, 1 for PS. For Network Mode: A host computer with an available 1 or 10 Gigabit Ethernet interface for sample streaming. White Rabbit is an Ethernet-based synchronization procedure; it is an extension of the IEEE 1588 Precision Time Protocol (PTP). When the source is set to "external", reading the LO frequency will return the ideal frequency for an external LO source. For more details on the internals of these corrections, see. The power supply provided with the USRP N320 kit is packaged with a power cord that is compatible with power outlets in the US/Japan. SFP0 will not be available for data transport in this mode. Description. Mender can be executed locally on the device, or a Mender server can be set up which can be used to remotely update an arbitrary number of USRP devices. When updating the file system using Mender, the tool will overwrite the root file system partition that is not currently mounted. configuration". The SDRuReceiver System object receives data from a Universal Software Radio Peripheral (USRP) hardware device, enabling simulation and development for various software-defined radio applications. Modern Linux systems offer alternatives to simply trying device nodes; instead, the OS might have a directory of symlinks under /dev/serial/by-id: NOTE: Exact names depend on the host operating system version and may differ. Specify the external reference clock frequency, default is 10 MHz. N3xx devices ship with all relevant software installed on the SD card. First, you need to get a copy of the MPM source code onto your device. Each filter is applied at 2x the master_clock_rate, or 250 MHz by default. Defaults to `addr'. The default user is root and the password is empty (no password). The JESD links are trained and brought up (between the FPGA and the ADC/DAC). This ratio is the decimation (down-conversion) or interpolation (up-conversion) factor. This specific mount is compatible with only the USRP N300, N310, N320, and N321, and allows the integration of up to eight bidirectional RF channels per 1U. However, those calibrations that are applicable can be enabled/disabled at initialization time using the tracking_cals and init_cals device args (see also Device arguments). . Set to 00 for channel 0, 01 for channel 1, etc. It is possible to gain root access to the device using a serial terminal emulator. The default MTU for the N3x0 series is 9000. In addition, the USRP N321 allows for the export of TX and RX LOs in a Star configuration to multiple other USRP N320 or USRP N321 devices. Listed below are the interfaces to connect to the USRP E320. Once the script is done, reboot the USRP (e.g., shutdown -r now), and when it comes up the autoboot flag should now work as desired. Additional information on Sample Rates can be found here in the UHD Manual: http://files.ettus.com/manual/page_general.html#general_sampleratenotes. Terms and conditions of sale can be accessed online at the following link: http://www.ettus.com/legal/terms-and-conditions-of-sale, 2022 Ettus Research, A National Instruments Company. If the decimation or interpolation factor exceeds 256, then it must be evenly divisible by 4. Salt is a third-party project with its own documentation, which should be consulted for configuring it. REF: Indicates a lock to the reference clock. On the E320, run mender -rootfs /path/to/latest.mender to update the file system: The artifact can also be stored on a remote server: This procedure will take a few minutes to complete. LINK: This LED will be lit when this USRP has been claimed by a UHD session. If operating with the 10 Gb Ethernet interface, the "XG" FPGA image must be loaded before the SFP+ port will operate at 10 Gb speeds. Having installed the toolchain in the last step, in order to build software for your device open a new shell and type: This will modify the PATH, CC, CXX etc, environment variables and allow you to compile software for your USRP N3xx device. Step-by-step guides for these software tools are found in the Application Notes for Building and Installing the USRP Open-Source Toolchain (UHD and GNU Radio) on Linux, OS X and Windows. Within the VM go to Devices > Insert Guest Additions CD > hit run when a box pops up. By setting the log level to DEBUG you will be able to observe the exact settings that cause fast vs. slow re-initialization. This example will test one full-duplex stream using "RF0/A:0", at a rate of 31.25 MS/s, for 60 seconds: This example will test four full-duplex streams at 30.72 MS/s, for 60 seconds: This example will test two full-duplex streams at 30.72 MS/s, for 60 seconds: NOTE: This example requires the XG FPGA image to be loaded. Note that some software interaction is necessary to enable the LMK04828, and thus this LED may be off even if a valid reference clock signal is connected. The N3XX series of USRPs is designed as a platform. Updating Filesystems Once you have successfully setup a management interface and streaming interface, you can now verify the devices operation using the included UHD utilities. This is a high performance SDR that uses a unique RF design by Ettus Research to provide 2 RX and 2 TX channels in a half-wide RU form factor. If the HG image is loaded, the port will be unresponsive at 10 Gb speeds. trademarks or trade names their respective companies. // is the preferred way. To integrate a USRP N3XX into your C++ application, you would generate a UHD device in the same way you would for any other USRP: For a list of which arguments can be passed into make(), see Section Device arguments. Included with the UHD driver example programs is a utility, benchmark_rate to benchmark the transport link of the system. If you require a full re-initialization every time a UHD session is spawned, specify the force_reinit flag as a device arg. Additional details of UHD Subdevice Specifications can be found here in the UHD Manual: http://files.ettus.com/manual/page_configuration.html#config_subdev. Your question or problem may have already been addressed before, and a relevant or helpful solution may already exist in the archive. Disable autoboot on USRP E320 (sets least significant bit to 0), regardless of whether currently enabled or disabled: Enable autoboot on USRP E320 (sets least significant bit to 1), regardless of whether currently enabled or disabled. Always use caution with FPGA, firmware, or software modifications. The USRP N310 is a networked software defined radio. Using Ethernet-Based Synchronization on the USRP N3xx Devices; N320/N321. Take the following precautions to prevent damage to the unit. If any items are missing, please contact sales@ettus.com immediately. A large portion of hardware-specific setup is handled by the daemon. Mismatched MTU values on either the Host or E320 may cause flow control errors. NOTE: This example will work with either the HG or XG FPGA image. This is particularly relevant if either a custom image was loaded, or if there is an active SSH or other connection coming in via the SFP+ ports. 3. USRP N300/N310/N320/N321 Getting Started Guide - Ettus. Further, it is strongly desirable for that ratio to be even. Then, run, to update the FPGA using the default settings. Actual LO input levels should be within +/- 2 dB of that value (i.e., between +3 dBm and +7 dBm). NOTE: The default UHD FPGA Images destination within the E320's file-system is /usr/share/uhd/images. From your host computer, run the command uhd_usrp_probe: You need to resize the socket buffers for your network interface card: The UHD driver includes several example programs, which may serve as test programs or the basis for your application program. This may be useful if the hardware was modified to use different filters, for example, because a signal of interest always falls onto a band edge. identify=5 (will blink for about 5 seconds). Connect to the ARM CPU via Serial Console or SSH as detailed in the section above. The N3XX series uses a micro SD card as its main storage. Placing a switch or other network gear between the Host and USRP can reduce throughput of the transport link. This interface should be separate from the 1Gb NIC/network which is connected to the 1Gb RJ45 management interface. There are three master clock rates (MCR) supported on the N320/N321: 200 MHz, 245.76 MHz, 250 MHz. Their default MTU value is 9000. From your host computer, run the command uhd_usrp_probe: The UHD driver includes several example programs, which may serve as test programs or the basis for your application program. PPS: This LED will blink once every second to indicate a valid PPS signal. Below is the subdev mapping of RF Ports. It is both a dual-core ARM Cortex A9 CPU and Kintex-7 FPGA on a single die. However, it can also be used to store user data, such as calibration information. Before doing any major work with a newly acquired USRP N300/N310, it is recommended to update the file system. The USRP E320 requires UHD version 3.13.0.2 or later. It has 2 TX/RX channels (on a single daughterboard; the daughterboard itself is the same as the N310) and a smaller FPGA (XCZ035). You can query the lock status with the gps_locked sensor, as well as obtain raw NMEA sentences using the gps_gprmc, and gps_gpgga sensors. 5. It is possible to gain shell access to the device using a serial terminal emulator via the Serial Console port. Streaming via SFP0 at 1 Gb rates requires a MTU of, Streaming via SFP0 at 10 Gb rates requires a MTU of. The power level of the reference clock cannot exceed +10 dBm. Refer to the Salt documentation on how to configure the minion and the master. The main CPU of the N310 is a Xilinx Zynq SoC XC7Z100 (exception: The N300). One-hot encoded pps_select to use the internally generated PPS with a 25 MHz ref_clk. With a wide frequency range from 70 MHz to 6 GHz and a user-pro-grammable, industrial-grade Xilinx Spar-tan-6 XC6SLX150 FPGA, this exible and compact platform is ideal for both hobbyist 3. The artifact can also be stored on a remote server: This procedure will take a while. It is important to understand that strictly-integer decimation and interpolation are used within USRP hardware to meet the requested sample rate requirements of the application at hand. In this example, we load the XG variant of the FPGA image. Bits [1:0] are for GPIO 0. Timeout for initial calibrations in milliseconds. Modules are always assembled such that the daughterboards have the same revision number. The | symbol can be used to combine keys (equivalent to a bitwise OR). Tests can be run by specifying their name, e.g. If there are multiple N3x0 devices in a single UHD session, they will be initialized in parallel. The difference between the N320 and the N321 is in its LO sharing capability. The N310 daughterboard has an EEPROM which is primarily used for storing the serial number, product ID, and other product-specific information. For addition details on network configuration here: https://files.ettus.com/manual/page_usrp_n3xx.html#n3xx_network_configuration. Tests may also load different FPGA images, if required. Your computer may need to be restarted for the MTU value to take effect. The battery will enable the USRP E312 to operate for approximately 2 hours 20 minutes, when transmitting and receiving on both channels (2x2 MIMO), with maximum gain settings, at 5 GHz center frequency, and 1 MS/s sample rate. 2022 NI. The USRP N320 is a networked software defined radio that provides reliability and fault-tolerance for deployment in large scale and distributed wireless systems. For Stand-Alone Embedded Mode: A host computer with an available 1 Gigabit Ethernet port or a USB 2.0 port to remotely access the embedded Linux operating system running on ARM CPU. This is a simple way to update groups of rack-mounted USRPs with custom file systems. USRP N320 l mt thit b v tuyn c lp c nh ngha bng phn mm c ni mng, cung cp tin cy v kh nng chu li trin khai trong cc h thng khng dy phn tn v quy m ln. The exact device node depends on your operating system's driver and other USB devices that might be already connected. The command help will list all available commands. Always properly terminate the transmit port with an antenna or 50 load. The STM32 microcontroller (which controls the power sequencing, among other things) also has a serial console available. Complete the steps below to set up a streaming connection over the 10 Gigabit Ethernet interface on SFP Port 1. For Network Mode: A host computer with an 1 or 10 Gb Ethernet interface. In particular, changing the master clock rate, the clock source, or the calibration masks will force a full re-initialization which is very slow compared to the fast re-initialization. That means that the desired sample rate must meet the requirement that master-clock-rate/desired-sample-rate be an integer ratio. After the device has obtained an IP address, you can remotely log into it from a Linux or macOS system with SSH, as shown below: NOTE: The IP address may vary depending on your network setup. OEM options available. Often your question can be answered quickly on the mailing lists. The difference between the N320 and the N321 is in its LO sharing capability. Install the salt-master package on the server (e.g. This is a high performance SDR that uses a unique RF design by Ettus Research to provide 2 RX and 2 TX channels in a half-wide RU form factor. Connect the device to the host computer using either the RJ45 or SFP+ port, refer to the section above for detailed instructions. If the decimation or interpolation factor exceeds 128, then it must be evenly divisible by 2. The N320 is a 2-channel transmitter/receiver using discrete components instead of an RFIC. To use White Rabbit, it is necessary to provide an appropriate reference via Ethernet. The USRP N-Series devices have two network connections: The dual SFP ports, and an RJ-45 connector. The STM32 controls the power sequencing and several other low level device operations. Load the XG FPGA image for 10 Gb streaming as detailed in the section Updating the FPGA Image. Please see the separate application note, Writing the USRP File System Disk Image to a SD Card, for step-by-step instructions on writing the file system image to the SD card. Additional information on Sample Rates can be found here in the UHD Manual: http://files.ettus.com/manual/page_general.html#general_sampleratenotes. An odd decimation factor will result in additional unwanted attenuation (roll-off from the CIC filter in the DUC and DDC blocks in the FPGA). To speed things up, the device will retain a state between sessions, but only if no relevant settings were touched. Ettus Research provides SD card images at regular intervals, but there can be good reasons to build custom SD cards, e.g., to test the very latest UHD or MPM for which there has not been an SD card release, to add own applications to the SD card, or to run a modified version of UHD. Any data stored in the root partitions will be permanently lost with a Mender update. If this value were 0x09 (0b00001001 in binary) it would indicate that autoboot is enabled because least significant bit is 1; same would be true if this value is 0x01 (0b00000001 in binary). 1. This can be accomplished by removing the top plate of the USRP N200/N210, which is secured with two screws. This is a high performance SDR that uses a unique RF design by Ettus Research to provide 2 RX and 2 TX channels in a half-wide RU form factor. If the product arrived in a nonfunctional state or you require technical assistance, please contact support@ettus.com. The SDK is shipped in the same way as the other binaries, and you can download the correct version using uhd_images_downloader. See also Section The SD card. USRP N320/N321 LO Distribution; 5G NR EVM Measurements with the USRP N320/N321; Turning the Device Off/On. Please allow 24 to 48 hours for response by email, depending on holidays and weekends, although we are often able to reply more quickly than that. The Knowledge Base is located at https://kb.ettus.com. The IQ and DC offset compensation components can be controlled from the host side using the correction APIs. Due to product compliance restrictions on products with TPM (Trusted Platform Module) components to a few countries, the USRP N320 is available in two variants: Only the non-TPM variant of the USRP N320 will be available in the Peoples Republic of China and Hong Kong. The dashboard can also be used to inspect the state of USRPs. Please contact[emailprotected]if you would like more information. Skip the initialization process for the device. NOTE: This example requires the HG FPGA image to be loaded. Location information can be parsed out of the gps_gpgga sensor by using gpsd or another NMEA parser. The USRP N310 contains 4 channels, each represented on the front panel as RF0-3. Using a PPS signal for timestamp synchronization requires a square wave signal with the following a 5Vpp amplitude. NOTE: The XG FPGA image must be loaded for SFP Port 0 to operate at 10 Gb speeds. Connect the SFP+ adapter on the device to an Ethernet port on the host computer using a standard Ethernet cable. benchmark_rate will exercise the transport link and CPU of the system. All Rights Reserved. This is not a complete listing of the supported sample rates. For the sfp_loopback test, the two ports need to be connected together. Never allow any water or condensing moisture to come into contact with the device. The object enables communication with a USRP board on the same Ethernet subnetwork or a USRP board via a USB connection. Along with X410 support, UHD 4.1 also brings usability and stability enhancements to UHD and to the entire stable of NI Ettus USRP devices. The N320 has a higher maximum analog bandwidth than the N310. Any data stored on that partition will be permanently lost. The UHD utility uhd_usrp_probe provides detailed information of the USRP device. You can write a MATLAB application that uses the System . Like with the serial console, you should be presented with a prompt like the following: The RJ45 port (eth0) comes up with a default configuration of DHCP, that will request a network address from your DHCP server (if available on your network). Some tests require special hardware connected. Once you have successfully setup a management interface and streaming interface, you can now verify the devices operation using the include UHD utilities. You should not try to source more than 5mA per pin. Connect to the ARM CPU via Serial Console or via SSH. The USRP N310 requires UHD version 3.11.0.0 or later. Care needs to be taken when editing these files on the device, since vi / vim sometimes generates undo files (e.g. For more information on updating the file-system, refer to the UHD Manual at https://uhd.ettus.com. Insert the RJ45-to-SFP+ adapter into the SFP+ Port. 4. The FPGA is immediately updated, and this FPGA image will continue to be used. Furthermore, this USRP with TPM will not be available in France, Israel or Russia until the USRP is registered in those countries. For the N320, the LO IN TX and LO IN RX connectors are used. In this case, simply run, to update the local cache of FPGA images. If this release fails to work in some way, then try the maintenance branch of the latest stable version.